Difference between revisions of "Instruction Set/callfln"

From Mill Computing Wiki
Jump to: navigation, search
Line 19:Line 19:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#946|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#callfln|Tin]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#946|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#callfln|Copper]] || F0 F1 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#946|Silver]] || F0 F1 F2 || 1
+
| [[Cores/Silver/Encoding#callfln|Silver]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#946|Gold]] || F0 F1 F2 F3 || 1
+
| [[Cores/Gold/Encoding#callfln|Gold]] || F0 F1 F2 F3 || 1
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#946|Decimal8]] || F0 F1 F2 || 1
+
| [[Cores/Decimal8/Encoding#callfln|Decimal8]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#946|Decimal16]] || F0 F1 F2 || 1
+
| [[Cores/Decimal16/Encoding#callfln|Decimal16]] || F0 F1 F2 || 1
 
|}
 
|}
  
Line 48:Line 48:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#947|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#callfln|Tin]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#947|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#callfln|Copper]] || F0 F1 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#947|Silver]] || F0 F1 F2 || 1
+
| [[Cores/Silver/Encoding#callfln|Silver]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#947|Gold]] || F0 F1 F2 F3 || 1
+
| [[Cores/Gold/Encoding#callfln|Gold]] || F0 F1 F2 F3 || 1
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#947|Decimal8]] || F0 F1 F2 || 1
+
| [[Cores/Decimal8/Encoding#callfln|Decimal8]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#947|Decimal16]] || F0 F1 F2 || 1
+
| [[Cores/Decimal16/Encoding#callfln|Decimal16]] || F0 F1 F2 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Revision as of 02:37, 16 December 2014

realizing  flow stream  flow block  call phase   operation  

native on: all

function call

callfln(op q, lit n, p target, args args) → ops r0 ...rn

operands: like Inv :


encoding: callfln(op q, lit n, p target, off argc, count args)

Core In Slots Latencies
Tin F0 1
Copper F0 F1 1
Silver F0 F1 F2 1
Gold F0 F1 F2 F3 1
Decimal8 F0 F1 F2 1
Decimal16 F0 F1 F2 1

callfln(op q, lit n, lbl target, args args) → ops r0 ...rn

operands: like Inv :


encoding: callfln(op q, lit n, off target, count argc) , callfln(op q, lit n, off target, count argc, lit argv)

Core In Slots Latencies
Tin F0 1
Copper F0 F1 1
Silver F0 F1 F2 1
Gold F0 F1 F2 F3 1
Decimal8 F0 F1 F2 1
Decimal16 F0 F1 F2 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/callfln&oldid=1713"