Difference between revisions of "Instruction Set/addfz"

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(Created page with "{{DISPLAYTITLE:addfz}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream [[Decode|exu block]...")
 
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addition
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Floating point add in current rounding towards zero.
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<code style="font-size:130%"><b style="color:#050">addfz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">addfz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>

Revision as of 10:19, 12 November 2014

realizing  exu stream  exu block  compute phase   operation   in the binary floating point value domain   that produces condition codes

native on: Silver Gold

Floating point add in current rounding towards zero.


addfz(f x, f y) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Gold E0 E1 E2 E3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5