Difference between revisions of "Instruction Set/internalized"

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(Created page with "{{DISPLAYTITLE:internalized}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  flow stream Decode|fl...")
 
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
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| [[Cores/Decimal8/Encoding#488|Decimal8]] || F0 F1 F2 F3 || 1
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| [[Cores/Decimal8/Encoding#internalized|Decimal8]] || F0 F1 F2 F3 || 1
 
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|-
| [[Cores/Decimal16/Encoding#488|Decimal16]] || F0 F1 F2 F3 || 1
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| [[Cores/Decimal16/Encoding#internalized|Decimal16]] || F0 F1 F2 F3 || 1
 
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[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 01:35, 3 January 2015

realizing  flow stream  flow block  compute phase   operation   in the decimal floating point value domain  

native on: Decimal8 Decimal16

convert a floating-point number from memory to internal format


internalized(d x) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 F0 F1 F2 F3 1
Decimal16 F0 F1 F2 F3 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable