Difference between revisions of "Instruction Set/lssfx"

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(Created page with "{{DISPLAYTITLE:lssfx}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream [[Decode|exu block]...")
 
 
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{{DISPLAYTITLE:lssfx}}
 
{{DISPLAYTITLE:lssfx}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp;<br />
'''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br />
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'''native on:''' [[Cores/Silver|Silver]] <br />
 
</div>
 
</div>
  
less than
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Binary float lesser than comparison. NaN-Aware.
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When one or both of the operands are a <abbr title="Not a Number">NaN</abbr>, the comparison is false.
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<b>related operations:</b> [[Instruction_Set/lssf|lssf]]                                         
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----
 
----
 
<code style="font-size:130%"><b style="color:#050">lssfx</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">lssfx</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#556|Silver]] || E0 E1 || w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
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| [[Cores/Silver/Encoding#lssfx|Silver]] || E0 E1 ||  
|-
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| [[Cores/Gold/Encoding#556|Gold]] || E0 E1 E2 E3 || w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
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|}
 
|}
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[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:09, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the binary floating point value domain  

native on: Silver

Binary float lesser than comparison. NaN-Aware. When one or both of the operands are a NaN, the comparison is false.

related operations: lssf


lssfx(f x, f y) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable