Difference between revisions of "Instruction Set/muluf"

From Mill Computing Wiki
Jump to: navigation, search
(Created page with "{{DISPLAYTITLE:muluf}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream [[Decode|exu block]...")
 
 
(4 intermediate revisions by the same user not shown)
Line 1:Line 1:
 
{{DISPLAYTITLE:muluf}}
 
{{DISPLAYTITLE:muluf}}
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned fixed point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned fixed point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
  
−
multiplication
+
Unsigned Fixed Point multiply. Uses current dynamic rounding mode.
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">muluf</b>(<span style="color:#009">[[Domains#uf|uf]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#uf|uf]]</span> <span title="belt operand from ops window">y</span>, <i><span style="color:#009">[[Immediates#bit|bit]]</span> <span title="bit number">dot</span></i>) &#8594; [[Domains#uf|uf]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">muluf</b>(<span style="color:#009">[[Domains#uf|uf]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#uf|uf]]</span> <span title="belt operand from ops window">y</span>, <i><span style="color:#009">[[Immediates#bit|bit]]</span> <span title="bit number">dot</span></i>) &#8594; [[Domains#uf|uf]] r<sub>0</sub></code>
Line 14:Line 15:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#609|Tin]] || E0 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
| [[Cores/Tin/Encoding#muluf|Tin]] || E0 ||  
 
|-
 
|-
−
| [[Cores/Copper/Encoding#609|Copper]] || E0 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
| [[Cores/Copper/Encoding#muluf|Copper]] || E0 ||  
 
|-
 
|-
−
| [[Cores/Silver/Encoding#609|Silver]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
| [[Cores/Silver/Encoding#muluf|Silver]] || E0 E1 ||  
 
|-
 
|-
−
| [[Cores/Gold/Encoding#609|Gold]] || E0 E1 E2 E3 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
| [[Cores/Gold/Encoding#muluf|Gold]] || E0 ||  
−
|-
+
−
| [[Cores/Decimal8/Encoding#609|Decimal8]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#609|Decimal16]] || E0 E1 || b,b:b=3 bv,bv:bv=3 h,h:h=3 hv,hv:hv=3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=4 qv,qv:qv=4
+
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:07, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the unsigned fixed point value domain   using modulo overflow behavior   that produces condition codes and rounds use current dynamic rounding mode

native on: all

Unsigned Fixed Point multiply. Uses current dynamic rounding mode.

muluf(uf x, uf y, bit dot) → uf r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/muluf&oldid=5092"