Difference between revisions of "Instruction Set/storef"

From Mill Computing Wiki
Jump to: navigation, search
(Created page with "{{DISPLAYTITLE:storef}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  flow stream Decode|flow blo...")
 
 
(2 intermediate revisions by the same user not shown)
Line 4:Line 4:
 
</div>
 
</div>
  
store to memory
+
Take a value from the belt and store it to the computed address as a binary float.
 +
 
 +
There is an internal and a storage format for binary float values. Because of this there are special operations needed for loading and storing them to convert between the formats. Other than that these operations work like a normal [[Instruction_Set/store|store]].
 +
 
 +
<b>related operations:</b>  [[Instruction_Set/store|store]], [[Instruction_Set/stored|stored]], [[Instruction_Set/load|load]]
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">storef</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">b</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">o</span></i>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from opsWindow">i</span>, <i><span style="color:#009">[[Immediates#scale|scale]]</span> <span title="scale factor  
 
<code style="font-size:130%"><b style="color:#050">storef</b>(<span style="color:#009">[[Sources#base|base]]</span> <span title="base special register">b</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">o</span></i>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from opsWindow">i</span>, <i><span style="color:#009">[[Immediates#scale|scale]]</span> <span title="scale factor  
Line 15:Line 20:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#838|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#storef|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#838|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#storef|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|}
 
|}
  
Line 29:Line 34:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#839|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#storef|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#839|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#storef|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|}
 
|}
  
Line 44:Line 49:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#836|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#storef|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#836|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#storef|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|}
 
|}
  
Line 58:Line 63:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#837|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#storef|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#837|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#storef|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|}
 
|}
  
Line 73:Line 78:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Silver/Encoding#835|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#storef|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#835|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#storef|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 23:28, 20 January 2015

realizing  flow stream  flow block  writer phase   operation   in the binary floating point value domain  

native on: Silver Gold

Take a value from the belt and store it to the computed address as a binary float.

There is an internal and a storage format for binary float values. Because of this there are special operations needed for loading and storing them to convert between the formats. Other than that these operations work like a normal store.

related operations: store, stored, load


storef(base b, off o, s i, scale s, f v)

operands: like NoResult [xx]:


Core In Slots Latencies
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1

storef(base b, off o, f v)

operands: like NoResult [xx]:


Core In Slots Latencies
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1

storef(p b, off o, s i, scale s, f v)

operands: like NoResult [xx]:


Core In Slots Latencies
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1

storef(p b, off o, f v)

operands: like NoResult [xx]:


Core In Slots Latencies
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1

storef(p b, f v, memAttr m)

operands: like NoResult [xx]:


Core In Slots Latencies
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable