Difference between revisions of "Instruction Set/countrfl"

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'''encoding:'''
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<code style="font-size:100%"><b style="color:#050">countrfl</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">x</span>)</code>
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
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|-
 
|-
 
| [[Cores/Gold/Encoding#countrfl|Gold]] || E0 || 1
 
| [[Cores/Gold/Encoding#countrfl|Gold]] || E0 || 1
|-
 
| [[Cores/Decimal8/Encoding#countrfl|Decimal8]] || E0 || 1
 
|-
 
| [[Cores/Decimal16/Encoding#countrfl|Decimal16]] || E0 || 1
 
 
|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:07, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Count the zero bits from the right.

related operations: countlfl, countltr, countrtr


countrfl(op x) → op r0

operands: like Identity [xx:x]


encoding: countrfl(op x)

Core In Slots Latencies
Tin E0 1
Copper E0 1
Silver E0 1
Gold E0 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable