Difference between revisions of "Instruction Set/widens"
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{{DISPLAYTITLE:widens}} | {{DISPLAYTITLE:widens}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the signed integer value domain]] <br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> | ||
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---- | ---- | ||
| − | <code style="font-size:130%"><b style="color:#050">widens</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window"> | + | <code style="font-size:130%"><b style="color:#050">widens</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (exu)">width0</span></i>) → [[Domains#s|s]] r<sub>0</sub></code> |
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWiden|like Widen xx:2x]] | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWiden|like Widen xx:2x]] | ||
</div> | </div> | ||
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
| − | | [[Cores/Tin/Encoding#widens|Tin]] || E0 || | + | | [[Cores/Tin/Encoding#widens|Tin]] || E0 || |
|- | |- | ||
| − | | [[Cores/Copper/Encoding#widens|Copper]] || E0 | + | | [[Cores/Copper/Encoding#widens|Copper]] || E0 || |
|- | |- | ||
| − | | [[Cores/Silver/Encoding#widens|Silver]] || E0 E1 E2 E3 || | + | | [[Cores/Silver/Encoding#widens|Silver]] || E0 E1 E2 E3 || |
|- | |- | ||
| − | | [[Cores/Gold/Encoding#widens|Gold]] || E0 | + | | [[Cores/Gold/Encoding#widens|Gold]] || E0 || |
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | ||
Latest revision as of 14:14, 23 February 2021
speculable exu stream exu block compute phase operation in the signed integer value domain
native on: all
Double the scalar width of a signed integer.
Sign extends the upper half.
The natively available byte widths on all Cores are 1, 2, 4, 8, and on the high end also 16.
widens(s op0, width width0) → s r0
operands: like Widen xx:2x
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | |
| Copper | E0 | |
| Silver | E0 E1 E2 E3 | |
| Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
