Difference between revisions of "Instruction Set/wr"
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{{DISPLAYTITLE:wr}} | {{DISPLAYTITLE:wr}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|writer block]] [[Phasing|writer phase]] operation [[Domains|in the logical value domain]] <br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> | ||
hardware writer | hardware writer | ||
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---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">wr</b>(<span style="color:#009">[[Sources#reg|reg]]</span> <span title="special register name (as used in a Writer)">dst</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="value written">v</span>)</code> | <code style="font-size:130%"><b style="color:#050">wr</b>(<span style="color:#009">[[Sources#reg|reg]]</span> <span title="special register name (as used in a Writer)">dst</span>, <span style="color:#009">[[Domains#op|op]]</span> <span title="value written">v</span>)</code> | ||
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| [[Cores/Silver/Encoding#wr|Silver]] || W0 W1 W2 W3 W4 || 3 | | [[Cores/Silver/Encoding#wr|Silver]] || W0 W1 W2 W3 W4 || 3 | ||
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− | | [[Cores/Gold/Encoding#wr|Gold]] || W0 W1 | + | | [[Cores/Gold/Encoding#wr|Gold]] || W0 W1 || 3 |
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| [[Cores/Silver/Encoding#wr|Silver]] || W0 W1 W2 W3 W4 || 3 | | [[Cores/Silver/Encoding#wr|Silver]] || W0 W1 W2 W3 W4 || 3 | ||
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− | | [[Cores/Gold/Encoding#wr|Gold]] || W0 W1 | + | | [[Cores/Gold/Encoding#wr|Gold]] || W0 W1 || 3 |
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|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 14:12, 23 February 2021
speculable exu stream writer block writer phase operation in the logical value domain
native on: all
hardware writer
operands: like NoResult [xx]:
Core | In Slots | Latencies |
---|---|---|
Tin | W0 W1 | 3 |
Copper | W0 W1 | 3 |
Silver | W0 W1 W2 W3 W4 | 3 |
Gold | W0 W1 | 3 |
operands: like NoResult [xx]:
Core | In Slots | Latencies |
---|---|---|
Tin | W0 W1 | 3 |
Copper | W0 W1 | 3 |
Silver | W0 W1 W2 W3 W4 | 3 |
Gold | W0 W1 | 3 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable