Difference between revisions of "Instruction Set/subdz"

From Mill Computing Wiki
Jump to: navigation, search
m (Protected "Instruction Set/subdz": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
 
(One intermediate revision by the same user not shown)
Line 1:Line 1:
 
{{DISPLAYTITLE:subdz}}
 
{{DISPLAYTITLE:subdz}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward zero]]<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward zero]]<br />
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
+
'''native on:''' [[Assembly|none]]<br />
 
</div>
 
</div>
  
Line 11:Line 11:
 
</div>
 
</div>
 
<br />
 
<br />
 
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
| [[Cores/Decimal8/Encoding#subdz|Decimal8]] || E0 E1 || d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
 
|-
 
| [[Cores/Decimal16/Encoding#subdz|Decimal16]] || E0 E1 || d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
 
|}
 
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:13, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   that produces condition codes and rounds toward zero

native on: none

Decimal floating point subtraction in current rounding towards zero.


subdz(d x, d y) → d r0

operands: like Addd [dd:d]



Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable