Difference between revisions of "Instruction Set/rdivu"

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{{DISPLAYTITLE:rdivu}}
 
{{DISPLAYTITLE:rdivu}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp;<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>

Latest revision as of 09:30, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the unsigned integer value domain  

native on: all

Unsigned integer reciprocal dividion. Helper operation for software division implementation.

This operation creates a seed value for Newton-Rapheson, or other, iterative division.


rdivu(u x) → u r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2
Copper E0 E1 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2
Silver E0 E1 E2 E3 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2
Gold E0 E1 E2 E3 E4 E5 E6 E7 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2
Decimal8 E0 E1 E2 E3 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2
Decimal16 E0 E1 E2 E3 b:b=1 bv:bv=1 h:h=1 hv:hv=1 w:w=1 wv:wv=1 d:d=2 dv:dv=2 q:q=2 qv:qv=2


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