Difference between revisions of "Instruction Set/negsw"
From Mill Computing Wiki
(2 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
{{DISPLAYTITLE:negsw}} | {{DISPLAYTITLE:negsw}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the signed integer value domain]] [[Overflow|using widening overflow behavior]] [[Condition Code|that produces condition codes]]<br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> | ||
− | + | Integer arithmetic negation. Widening. | |
+ | 0 becomes. | ||
+ | |||
+ | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">negsw</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>) → [[Domains#s|s]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">negsw</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>) → [[Domains#s|s]] r<sub>0</sub></code> |
Latest revision as of 09:30, 9 February 2015
speculable exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
Integer arithmetic negation. Widening. 0 becomes.
operands: like Widen xx:2x
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | b:h=1 h:w=1 w:d=2 d:q=2 |
Copper | E0 E1 | b:h=1 h:w=1 w:d=2 d:q=2 |
Silver | E0 E1 E2 E3 | b:h=1 h:w=1 w:d=2 d:q=2 |
Gold | E0 E1 E2 E3 E4 E5 E6 E7 | b:h=1 h:w=1 w:d=2 d:q=2 |
Decimal8 | E0 E1 E2 E3 | b:h=1 h:w=1 w:d=2 d:q=2 |
Decimal16 | E0 E1 E2 E3 | b:h=1 h:w=1 w:d=2 d:q=2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable