Difference between revisions of "Instruction Set/flowArgs"

From Mill Computing Wiki
Jump to: navigation, search
 
(3 intermediate revisions by the same user not shown)
Line 1:Line 1:
 
{{DISPLAYTITLE:flowArgs}}
 
{{DISPLAYTITLE:flowArgs}}
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp;<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|flow stream]]&nbsp;&nbsp;[[Decode|flow block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>
  
 
four-byte constant continuation, conditional predicate, or other ganged argument
 
four-byte constant continuation, conditional predicate, or other ganged argument
 +
----
 +
<code style="font-size:130%"><b style="color:#050">flowArgs</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">arg</span></i>)</code>
 +
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 +
</div>
 +
<br />
 +
 +
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 +
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 +
|-
 +
| [[Cores/Tin/Encoding#flowArgs|Tin]] || F1 || 1
 +
|-
 +
| [[Cores/Copper/Encoding#flowArgs|Copper]] || F1 || 1
 +
|-
 +
| [[Cores/Silver/Encoding#flowArgs|Silver]] || F1 F2 F3 || 1
 +
|-
 +
| [[Cores/Gold/Encoding#flowArgs|Gold]] || F1 || 1
 +
|}
 +
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more return arguments">args</span>)</code>
 
<code style="font-size:130%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more return arguments">args</span>)</code>
Line 11:Line 29:
 
<br />
 
<br />
  
−
'''encoding:'''
 
−
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">arg</span>)</code>
 
−
<br />
 
 
'''encoding:'''  
 
'''encoding:'''  
 
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">arg</span></i>)</code>
 
<code style="font-size:100%"><b style="color:#050">flowArgs</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">arg</span></i>)</code>
Line 28:Line 43:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#flowArgs|Tin]] || F1 || 0
+
| [[Cores/Tin/Encoding#flowArgs|Tin]] || F1 || 1
−
|-
+
−
| [[Cores/Copper/Encoding#flowArgs|Copper]] || F1 || 0
+
−
|-
+
−
| [[Cores/Silver/Encoding#flowArgs|Silver]] || F1 F2 F3 || 0
+
 
|-
 
|-
−
| [[Cores/Gold/Encoding#flowArgs|Gold]] || F1 F2 F3 F4 F5 F6 F7 || 0
+
| [[Cores/Copper/Encoding#flowArgs|Copper]] || F1 || 1
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#flowArgs|Decimal8]] || F1 F2 F3 || 0
+
| [[Cores/Silver/Encoding#flowArgs|Silver]] || F1 F2 F3 || 1
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#flowArgs|Decimal16]] || F1 F2 F3 || 0
+
| [[Cores/Gold/Encoding#flowArgs|Gold]] || F1 || 1
 
|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 13:26, 23 February 2021

speculable  flow stream  flow block  compute phase   operation  

native on: all

four-byte constant continuation, conditional predicate, or other ganged argument

flowArgs(off arg)

operands: like Inv :


Core In Slots Latencies
Tin F1 1
Copper F1 1
Silver F1 F2 F3 1
Gold F1 1

flowArgs(ops args)

operands: like Inv :


encoding: flowArgs(off arg) , flowArgs(off arg, lit arg) , flowArgs(off arg, lit arg, lit arg) , flowArgs(off arg, lit arg, lit arg, lit arg)

Core In Slots Latencies
Tin F1 1
Copper F1 1
Silver F1 F2 F3 1
Gold F1 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

Retrieved from "http://millcomputing.com/w/index.php?title=Instruction_Set/flowArgs&oldid=4397"