Difference between revisions of "Instruction Set/f2sed"

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{{DISPLAYTITLE:f2sed}}
 
{{DISPLAYTITLE:f2sed}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using modulo overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
 
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
 
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
 
</div>
 
</div>
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
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|-
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| [[Cores/Decimal8/Encoding#315|Decimal8]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5  
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| [[Cores/Decimal8/Encoding#f2sed|Decimal8]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5  
 
|-
 
|-
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| [[Cores/Decimal16/Encoding#315|Decimal16]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5  
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| [[Cores/Decimal16/Encoding#f2sed|Decimal16]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5  
 
|}
 
|}
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[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 09:23, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   using modulo overflow behavior   that produces condition codes and rounds use current dynamic rounding mode

native on: Decimal8 Decimal16

Exactly convert a decimal floating point value to a signed integer, in current rounding mode and normal modulo overflow.

f2sed(d x) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5
Decimal16 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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