Difference between revisions of "Cores/Gold"
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| − | <b>[[Cores]]:</b> [[Cores/Tin|Tin]] [[Cores/Copper|Copper]] [[Cores/Silver|Silver]] [[Cores/Gold|Gold | + | <b>[[Cores]]:</b> [[Cores/Tin|Tin]] [[Cores/Copper|Copper]] [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] |
| − | The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive | + | The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive parallelism for both integer and floating point workloads, even for wide 128bit floating point. It can serve in a big compute server for simulations, or in a media creation workstation. |
| − | <b>[[Belt]]</b>: 32 <b>[[Decode#Morsel|Morsel]]</b>: 5bit <b>[[Operands|Scalar Width]]</b>: 128bit <b>[[Operands|Operand Maximum Size]]</b>: | + | <b>[[Belt]]</b>: 32 <b>[[Decode#Morsel|Morsel]]</b>: 5bit <b>[[Operands|Scalar Width]]</b>: 128bit <b>[[Operands|Operand Maximum Size]]</b>: 16B |
| − | <b>[[Pipeline]]s</b>: | + | <b>[[Pipeline]]s</b>: 19 <b>[[Retire Station]]s</b>: 16 <b>[[Scratchpad]]</b>: 16384B |
<b>[[Spiller|Spill Buffers]]</b>: 16 <b>[[Spiller|Spiller Stack Size]]</b>: 256MB | <b>[[Spiller|Spill Buffers]]</b>: 16 <b>[[Spiller|Spiller Stack Size]]</b>: 256MB | ||
| − | <b>[[Memory#Instruction_Cache|iCache Line]]</b>: | + | <b>[[Memory#Instruction_Cache|iCache Line]]</b>: NoneB |
| − | <b> | + | <b>2 reader slots</b>, 17bits wide <b>2 writer slots</b>, 20bits wide <b>1 pick slots</b>, 11bits wide |
| − | <b>exu slot 0</b>, | + | <b>exu slot 0</b>, 19bits wide, with functional units: [[Functional Unit#alu|alu]] [[Functional Unit#count|count]] [[Functional Unit#mul|mul]] [[Functional Unit#NaR|NaR]] [[Functional Unit#nope|nope]] [[Functional Unit#shift|shift]] [[Functional Unit#shuffle|shuffle]] |
| − | <b>exu slot 1</b>, | + | <b>exu slot 1</b>, 7bits wide, with functional units: [[Functional Unit#cc|cc]] [[Functional Unit#exuArgs|exuArgs]] |
| − | <b> | + | <b>flow slot 0</b>, 18bits wide, with functional units: [[Functional Unit#boot|boot]] [[Functional Unit#cache|cache]] [[Functional Unit#con|con]] [[Functional Unit#conform|conform]] [[Functional Unit#control|control]] [[Functional Unit#ls|ls]] [[Functional Unit#misc|misc]] [[Functional Unit#nopf|nopf]] |
| − | + | <b>flow slot 1</b>, 8bits wide, with functional units: [[Functional Unit#flowArgs|flowArgs]] [[Functional Unit#nopf|nopf]] | |
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| − | <b>flow slot 1</b>, | + | |
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[[Cores/Gold/Encoding|Operation Encoding]] | [[Cores/Gold/Encoding|Operation Encoding]] | ||
Latest revision as of 14:14, 23 February 2021
The Gold core was conceived as the high end product, the reasonably most powerful configuration. It offers massive parallelism for both integer and floating point workloads, even for wide 128bit floating point. It can serve in a big compute server for simulations, or in a media creation workstation.
Belt: 32 Morsel: 5bit Scalar Width: 128bit Operand Maximum Size: 16B
Pipelines: 19 Retire Stations: 16 Scratchpad: 16384B
Spill Buffers: 16 Spiller Stack Size: 256MB
iCache Line: NoneB
2 reader slots, 17bits wide 2 writer slots, 20bits wide 1 pick slots, 11bits wide
exu slot 0, 19bits wide, with functional units: alu count mul NaR nope shift shuffle
exu slot 1, 7bits wide, with functional units: cc exuArgs
flow slot 0, 18bits wide, with functional units: boot cache con conform control ls misc nopf
flow slot 1, 8bits wide, with functional units: flowArgs nopf
