Difference between revisions of "Instruction Set/br"

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</div>
 
</div>
  
−
branch
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Conditionless branch.
−
----
+
There must always be exactly one conditionless branch or return operation in every [[EBB]], and always in last position. There can be several conditionless branches in an EBB and even in the same operation, which are all processes in parallel, but the first successful in the lowest slot wins.
−
<code style="font-size:130%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">target</span>)</code>
+
 
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
+
The targets in branches, whether literal or from a belt operand, are always relative to the  [[Registers|EBB entry point]]. The optional delay serves to synchronize with operations that need to finish before control is transferred to the next EBB.
−
</div>
+
 
−
<br />
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<b>related operations:</b> [[Instruction_Set/brtr|brtr]], [[Instruction_Set/brfl|brfl]]
  
−
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
 
−
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
−
|-
 
−
| [[Cores/Tin/Encoding#220|Tin]] || F0 || 1
 
−
|-
 
−
| [[Cores/Copper/Encoding#220|Copper]] || F0 F1 || 1
 
−
|-
 
−
| [[Cores/Silver/Encoding#220|Silver]] || F0 F1 F2 || 1
 
−
|-
 
−
| [[Cores/Gold/Encoding#220|Gold]] || F0 F1 F2 F3 || 1
 
−
|-
 
−
| [[Cores/Decimal8/Encoding#220|Decimal8]] || F0 F1 F2 || 1
 
−
|-
 
−
| [[Cores/Decimal16/Encoding#220|Decimal16]] || F0 F1 F2 || 1
 
−
|}
 
  
 
----
 
----
−
<code style="font-size:130%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#p|p]]</span> <span title="belt operand from opsWindow">target</span>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">delay</span></i>)</code>
+
<code style="font-size:130%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">op0</span>, <span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more return arguments">args</span>)</code>
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 
</div>
 
</div>
 +
<br />
 +
 +
'''encoding:'''
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">count0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic
 +
            args">off0</span></i>)</code>
 +
,
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">count0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">lit0</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">off0</span></i>)</code>
 +
,
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from opsWindow">count0</span>, <i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">op0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">lit0</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">lit1</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">off0</span></i>)</code>
 
<br />
 
<br />
  
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#217|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#br|Tin]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#217|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#br|Copper]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#217|Silver]] || F0 F1 F2 || 1
+
| [[Cores/Silver/Encoding#br|Silver]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#217|Gold]] || F0 F1 F2 F3 || 1
+
| [[Cores/Gold/Encoding#br|Gold]] || F0 || 1
−
|-
+
−
| [[Cores/Decimal8/Encoding#217|Decimal8]] || F0 F1 F2 || 1
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#217|Decimal16]] || F0 F1 F2 || 1
+
 
|}
 
|}
  
 
----
 
----
−
<code style="font-size:130%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#lbl|lbl]]</span> <span title="name of label or function">target</span></i>)</code>
+
<code style="font-size:130%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#lbl|lbl]]</span> <span title="name of label or function">off0</span></i>, <span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more return arguments">args</span>)</code>
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 
</div>
 
</div>
 +
<br />
 +
 +
'''encoding:'''
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">count0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">off0</span></i>)</code>
 +
,
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">count0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">lit0</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest
 +
            constant">off0</span></i>)</code>
 +
,
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">count0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">lit0</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest
 +
            constant">lit1</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">off0</span></i>)</code>
 +
,
 +
<code style="font-size:100%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#off|off]]</span> <span title="manifest constant">count0</span></i>, <i><span style="color:#009">[[Immediates#count|count]]</span> <span title="morsel-sized count of polyadic args">lit0</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest
 +
            constant">lit1</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">lit2</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">off0</span></i>)</code>
 
<br />
 
<br />
  
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#218|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#br|Tin]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#218|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#br|Copper]] || F0 || 1
 
|-
 
|-
−
| [[Cores/Silver/Encoding#218|Silver]] || F0 F1 F2 || 1
+
| [[Cores/Silver/Encoding#br|Silver]] || F0 F1 F2 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#218|Gold]] || F0 F1 F2 F3 || 1
+
| [[Cores/Gold/Encoding#br|Gold]] || F0 || 1
−
|-
+
−
| [[Cores/Decimal8/Encoding#218|Decimal8]] || F0 F1 F2 || 1
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#218|Decimal16]] || F0 F1 F2 || 1
+
 
|}
 
|}
  
−
----
 
−
<code style="font-size:130%"><b style="color:#050">br</b>(<i><span style="color:#009">[[Immediates#lbl|lbl]]</span> <span title="name of label or function">target</span></i>, <i><span style="color:#009">[[Immediates#lit|lit]]</span> <span title="morsel-sized manifest constant">delay</span></i>)</code>
 
−
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeInv|like Inv :]]
 
−
</div>
 
−
<br />
 
  
−
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
+
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
−
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
+
−
|-
+
−
| [[Cores/Tin/Encoding#219|Tin]] || F0 || 1
+
−
|-
+
−
| [[Cores/Copper/Encoding#219|Copper]] || F0 F1 || 1
+
−
|-
+
−
| [[Cores/Silver/Encoding#219|Silver]] || F0 F1 F2 || 1
+
−
|-
+
−
| [[Cores/Gold/Encoding#219|Gold]] || F0 F1 F2 F3 || 1
+
−
|-
+
−
| [[Cores/Decimal8/Encoding#219|Decimal8]] || F0 F1 F2 || 1
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#219|Decimal16]] || F0 F1 F2 || 1
+
−
|}
+

Latest revision as of 14:10, 23 February 2021

realizing  flow stream  flow block  transfer phase   operation  

native on: all

Conditionless branch. There must always be exactly one conditionless branch or return operation in every EBB, and always in last position. There can be several conditionless branches in an EBB and even in the same operation, which are all processes in parallel, but the first successful in the lowest slot wins.

The targets in branches, whether literal or from a belt operand, are always relative to the EBB entry point. The optional delay serves to synchronize with operations that need to finish before control is transferred to the next EBB.

related operations: brtr, brfl


br(op op0, ops args)

operands: like Inv :


encoding: br(op count0, off op0, count off0) , br(op count0, off op0, count lit0, lit off0) , br(op count0, off op0, count lit0, lit lit1, lit off0)

Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1

br(lbl off0, ops args)

operands: like Inv :


encoding: br(off count0, count off0) , br(off count0, count lit0, lit off0) , br(off count0, count lit0, lit lit1, lit off0) , br(off count0, count lit0, lit lit1, lit lit2, lit off0)

Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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