Difference between revisions of "Instruction Set/fmafz"
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{{DISPLAYTITLE:fmafz}} | {{DISPLAYTITLE:fmafz}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Rounding|and rounds toward zero]]<br /> |
− | '''native on:''' [[Cores/Silver|Silver | + | '''native on:''' [[Cores/Silver|Silver]] <br /> |
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Returns x*y+z on the belt.<br /> | Returns x*y+z on the belt.<br /> | ||
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | {| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | ||
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
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− | | [[Cores/Silver/Encoding#fmafz|Silver]] || E0 E1 || | + | | [[Cores/Silver/Encoding#fmafz|Silver]] || E0 E1 || |
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[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 14:05, 23 February 2021
speculable exu stream exu block compute phase operation in the binary floating point value domain and rounds toward zero
native on: Silver
Binary floating point fused multiply-add. As usual for those, it yields a higher precision than doing it separately, and is faster too. Rounds towards zero.
operands: like Addf [ff:f]
Returns x*y+z on the belt.
Core | In Slots | Latencies |
---|---|---|
Silver | E0 E1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable