Difference between revisions of "Instruction Set/fmaf"
From Mill Computing Wiki
(2 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
{{DISPLAYTITLE:fmaf}} | {{DISPLAYTITLE:fmaf}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Rounding|and rounds use current dynamic rounding mode]]<br /> |
− | '''native on:''' [[Cores/Silver|Silver | + | '''native on:''' [[Cores/Silver|Silver]] <br /> |
</div> | </div> | ||
Line 14: | Line 14: | ||
</div> | </div> | ||
Returns x*y+z on the belt.<br /> | Returns x*y+z on the belt.<br /> | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | {| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | ||
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
− | | [[Cores/Silver/Encoding#fmaf|Silver]] || E0 E1 || | + | | [[Cores/Silver/Encoding#fmaf|Silver]] || E0 E1 || |
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 13:25, 23 February 2021
speculable exu stream exu block compute phase operation in the binary floating point value domain and rounds use current dynamic rounding mode
native on: Silver
Binary floating point fused multiply-add. As usual for those, it yields a higher precision than doing it separately, and is faster too. Uses current rounding behaviour.
operands: like Addf [ff:f]
Returns x*y+z on the belt.
Core | In Slots | Latencies |
---|---|---|
Silver | E0 E1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable