Difference between revisions of "Instruction Set/conform"
(Created page with "{{DISPLAYTITLE:conform}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing flow stream Decode|flow bl...") | |||
| (4 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
{{DISPLAYTITLE:conform}} | {{DISPLAYTITLE:conform}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|flow stream]] [[Decode|flow block]] [[Phasing|conform phase]] operation <br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> | ||
| − | + | Reorder belt. | |
| + | |||
| + | Control can be transferred into an [[EBB]] from multiple possible locations, yet the target expects the belt to be in a specific order, which often not all possible origin EBBs can provide with their default scheduling. For this reason there is the conform operation, that reorders the belt in the way the target of the branch expects it to be. | ||
| + | |||
| + | The operation is called conform, because usually there is a default order that is established by the most common or original origin-entry point control transfer as established by the compiler. All other transfers into this [[EBB]] must conform to the order of the belt the original come-from EBB establishes. | ||
| + | |||
| + | Conform invalidates all belt values not explicitly reordered. | ||
| + | |||
| + | <b>related operations:</b> [[Instruction_Set/rescue|rescue]] | ||
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">conform</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more conform arguments from conforms window">args</span>) → [[Domains|ops]] r<sub>0</sub> ...</code> | <code style="font-size:130%"><b style="color:#050">conform</b>(<span style="color:#009">[[Domains#ops|ops]]</span> <span title="one or more conform arguments from conforms window">args</span>) → [[Domains|ops]] r<sub>0</sub> ...</code> | ||
| Line 27: | Line 36: | ||
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
| − | | [[Cores/Tin/Encoding# | + | | [[Cores/Tin/Encoding#conform|Tin]] || F0 || 1 |
|- | |- | ||
| − | | [[Cores/Copper/Encoding# | + | | [[Cores/Copper/Encoding#conform|Copper]] || F0 F1 || 1 |
|- | |- | ||
| − | | [[Cores/Silver/Encoding# | + | | [[Cores/Silver/Encoding#conform|Silver]] || F0 F1 F2 || 1 |
|- | |- | ||
| − | | [[Cores/Gold/Encoding# | + | | [[Cores/Gold/Encoding#conform|Gold]] || F0 F1 F2 F3 || 1 |
|- | |- | ||
| − | | [[Cores/Decimal8/Encoding# | + | | [[Cores/Decimal8/Encoding#conform|Decimal8]] || F0 F1 F2 || 1 |
|- | |- | ||
| − | | [[Cores/Decimal16/Encoding# | + | | [[Cores/Decimal16/Encoding#conform|Decimal16]] || F0 F1 F2 || 1 |
|} | |} | ||
| + | |||
| + | |||
| + | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | ||
Latest revision as of 09:23, 9 February 2015
Reorder belt.
Control can be transferred into an EBB from multiple possible locations, yet the target expects the belt to be in a specific order, which often not all possible origin EBBs can provide with their default scheduling. For this reason there is the conform operation, that reorders the belt in the way the target of the branch expects it to be.
The operation is called conform, because usually there is a default order that is established by the most common or original origin-entry point control transfer as established by the compiler. All other transfers into this EBB must conform to the order of the belt the original come-from EBB establishes.
Conform invalidates all belt values not explicitly reordered.
related operations: rescue
conform(ops args) → ops r0 ...
encoding:
conform(off ops, count c)
,
conform(off ops, count c, lit ops)
,
conform(off ops, count c, lit ops, lit ops)
,
conform(off ops, count c, lit ops, lit ops, lit ops)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 | 1 |
| Gold | F0 F1 F2 F3 | 1 |
| Decimal8 | F0 F1 F2 | 1 |
| Decimal16 | F0 F1 F2 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
