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| − | <p style="font-size: 12pt;"> | + | The Mill is a new general purpose processor architecture. |
| − | [[#0|0]]
| + | It intends to run general purpose code at <abbr title="Digital Signal Processor">DSP</abbr> speed and power requirements. |
| − | [[#a|a]]
| + | A number of new innovations and established old technologies used in a new context need to be employed to achieve this goal. |
| − | [[#b|b]]
| + | |
| − | [[#c|c]]
| + | |
| − | [[#d|d]]
| + | |
| − | [[#e|e]]
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| − | [[#f|f]]
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| − | [[#g|g]]
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| − | [[#h|h]]
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| − | [[#i|i]]
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| − | [[#j|j]]
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| − | [[#k|k]]
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| − | [[#l|l]]
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| − | [[#m|m]]
| + | |
| − | [[#n|n]]
| + | |
| − | [[#o|o]]
| + | |
| − | [[#p|p]]
| + | |
| − | [[#q|q]]
| + | |
| − | [[#r|r]]
| + | |
| − | [[#s|s]]
| + | |
| − | [[#t|t]]
| + | |
| − | [[#u|u]]
| + | |
| − | [[#v|v]]
| + | |
| − | [[#w|w]]
| + | |
| − | [[#x|x]]
| + | |
| − | [[#y|y]]
| + | |
| − | [[#z|z]]
| + | |
| − | </p> | + | |
| | | | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="0">0</div> | + | <table style="width: 50%; padding: 2% 5%; font-size: 12pt"> |
| − | | + | <tr><td>'''[[Architecture]]'''</td><td>'''[[Infrastructure]]'''</td><td>'''[[Community]]'''</td></tr> |
| − | <div style="font-size: 10pt; font-weight: bold;" id="a">a</div>
| + | <tr><td>[[Belt]]</td><td>[[Synthesis]]</td> <td>[[Software]]</td></tr> |
| − | | + | <tr><td>[[Encoding]]</td><td>[[Compiler]]</td></tr> |
| − | <div style="font-size: 10pt; font-weight: bold;" id="b">b</div> | + | <tr><td>[[Memory]]</td><td>[[Specializer]]</td></tr> |
| − | [[Belt]] – provides the functionality of general purpose registers<br /> | + | <tr><td>[[Metadata]]</td><td>[[Debugger]]</td></tr> |
| − | [[Belt Slot]] – the read only data source for machine operations<br /> | + | <tr><td>[[Protection]]</td><td>[[Simulator]]</td></tr> |
| − | [[Bundle]] – a collection of instructions that get fetched from memory together<br /> | + | <tr><td>[[Prediction]]</td><td>[[Specification]]</td></tr> |
| − | | + | <tr><td>[[Execution]]</td><td>[[conAsm]]</td></tr> |
| − | <div style="font-size: 10pt; font-weight: bold;" id="c">c</div>
| + | <tr><td>[[Instruction Set]]</td><td>[[genAsm]]</td></tr> |
| − | | + | </table> |
| − | <div style="font-size: 10pt; font-weight: bold;" id="d">d</div> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="e">e</div>
| + | |
| − | [[EBB]] – Extended Basic Block<br /> | + | |
| − | [[Exit]] – a point where the instruction stream can leave the EBB<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="f">f</div> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="g">g</div>
| + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="h">h</div> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="i">i</div>
| + | |
| − | [[Implicit Zero]] - uninitialized memory loads are implicitly zero<br /> | + | |
| − | [[Instruction]] – a collection of operations that get executed together<br />
| + | |
| − | [[Instruction Stream]] – a sequence of instructions, the Mill has 2 working in parallel<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="j">j</div>
| + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="k">k</div> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="l">l</div>
| + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="m">m</div>
| + | |
| − | [[Metadata]] – tags attached to belt slots that describe the data in it<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="n">n</div> | + | |
| − | [[None]] – undefined data in a slot that is silently ignored by operations<br /> | + | |
| − | [[NaR]] – Not a Result, undefined data that traps when used in certain operations<br />
| + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="o">o</div> | + | |
| − | [[Operation]] – the most basic semantically defined hardware unit of execution<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="p">p</div> | + | |
| − | [[Phase]] - sequenced execution of different operations within one instruction<br /> | + | |
| − | [[PLB]] – Protection Lookaside Buffer<br />
| + | |
| − | [[Portal]] – a cross turf call destination<br />
| + | |
| − | [[Protection Region]] – specified continuous memory region with attached permissions<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="q">q</div> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="r">r</div>
| + | |
| − | [[Replay]] - the way the hardware restores machine state after being interrupted<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="s">s</div>
| + | |
| − | [[SAS]] – Single Address Space<br />
| + | |
| − | [[Service]] – a stateful call interface that can cross protection barriers<br />
| + | |
| − | [[Specializer]] – turns general mill assembly into hardware specific machine instructions<br /> | + | |
| − | [[Spiller]] – securely manages temporary memory used by certain operations in hardware<br /> | + | |
| − | [[Stacklet]] – hardware managed memory line used in fragmented stacks<br />
| + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="t">t</div> | + | |
| − | [[TLB]] – Translation Lookaside Buffer<br /> | + | |
| − | [[Turf]] – memory protection domain on the Mill, a collection of regions<br /> | + | |
| − | | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="u">u</div>
| + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="v">v</div> | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="w">w</div>
| + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="x">x</div> | + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="y">y</div>
| + | |
| − | <div style="font-size: 10pt; font-weight: bold;" id="z">z</div>
| + | |
The Mill is a new general purpose processor architecture.
It intends to run general purpose code at DSP speed and power requirements.
A number of new innovations and established old technologies used in a new context need to be employed to achieve this goal.
