Difference between revisions of "Instruction Set/s2fdz"
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Revision as of 01:28, 3 January 2015
realizing exu stream exu block compute phase operation in the decimal floating point value domain that produces condition codes and rounds toward zero
convert signed integer to float
operands: like Addd [dd:d]
| Core | In Slots | Latencies |
|---|---|---|
| Decimal8 | E0 E1 | d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
| Decimal16 | E0 E1 | d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
