Difference between revisions of "Instruction Set/mulfn"
From Mill Computing Wiki
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{{DISPLAYTITLE:mulfn}} | {{DISPLAYTITLE:mulfn}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Condition Code|that produces condition codes]]<br /> | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /> |
'''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br /> | '''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br /> | ||
</div> | </div> | ||
Revision as of 18:51, 20 December 2014
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes and rounds toward negative infinity
Floating point multplication in current rounding to nearest.
operands: like Addf [ff:f]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 E1 | w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6 |
| Gold | E0 E1 E2 E3 | w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
