Difference between revisions of "Instruction Set/divfe"

From Mill Computing Wiki
Jump to: navigation, search
Line 1:Line 1:
 
{{DISPLAYTITLE:divfe}}
 
{{DISPLAYTITLE:divfe}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds to nearest, ties toward even adjacent value]]<br />
 
'''native on:''' [[Assembly|none]]<br />
 
'''native on:''' [[Assembly|none]]<br />
 
</div>
 
</div>

Revision as of 18:51, 20 December 2014

realizing  exu stream  exu block  compute phase   operation   in the binary floating point value domain   that produces condition codes and rounds to nearest, ties toward even adjacent value

native on: none

Floating point division in current rounding to even.


divfe(f x, f y) → f r0

operands: like Addf [ff:f]



Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable