Difference between revisions of "Instruction Set/eqlf"

From Mill Computing Wiki
Jump to: navigation, search
Line 4:Line 4:
 
</div>
 
</div>
  
equal
+
Binary float equality comparison.
 +
When one of the operands is a <abbr title="Not a Number">NaN</abbr>, a floating point invalid [[NaR]] is produced as the result.
 +
 
 +
<b>related operations:</b> [[Instruction_Set/eqlfx|eqlfx]]                                         
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">eqlf</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">eqlf</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#f|f]] r<sub>0</sub></code>

Revision as of 17:07, 16 December 2014

realizing  exu stream  exu block  compute phase   operation   in the binary floating point value domain  

native on: Silver Gold

Binary float equality comparison. When one of the operands is a NaN, a floating point invalid NaR is produced as the result.

related operations: eqlfx


eqlf(f x, f y) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Gold E0 E1 E2 E3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable