Difference between revisions of "Instruction Set/recur"

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(Created page with "{{DISPLAYTITLE:recur}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream Decode|pick block...")
 
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#720|Tin]] || P0 || 0
+
| [[Cores/Tin/Encoding#recur|Tin]] || P0 || 0
 
|-
 
|-
−
| [[Cores/Copper/Encoding#720|Copper]] || P0 || 0
+
| [[Cores/Copper/Encoding#recur|Copper]] || P0 || 0
 
|-
 
|-
−
| [[Cores/Silver/Encoding#720|Silver]] || P0 P1 || 0
+
| [[Cores/Silver/Encoding#recur|Silver]] || P0 P1 || 0
 
|-
 
|-
−
| [[Cores/Gold/Encoding#720|Gold]] || P0 P1 P2 P3 || 0
+
| [[Cores/Gold/Encoding#recur|Gold]] || P0 P1 P2 P3 || 0
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#720|Decimal8]] || P0 P1 || 0
+
| [[Cores/Decimal8/Encoding#recur|Decimal8]] || P0 P1 || 0
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#720|Decimal16]] || P0 P1 || 0
+
| [[Cores/Decimal16/Encoding#recur|Decimal16]] || P0 P1 || 0
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Revision as of 02:39, 16 December 2014

realizing  exu stream  pick block  pick phase   operation   in the logical value domain  

native on: all

recurnce update

recur(sel q, op v1, op v2)

operands: like Inv :


Core In Slots Latencies
Tin P0 0
Copper P0 0
Silver P0 P1 0
Gold P0 P1 P2 P3 0
Decimal8 P0 P1 0
Decimal16 P0 P1 0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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