View source for Instruction Set/f2udx

{{DISPLAYTITLE:f2udx}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
</div>

Inexactly convert a decimal floating point value to a unsigned integer, in current rounding mode and producing [[NaR]]s on overflow.

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<code style="font-size:130%"><b style="color:#050">f2udx</b>(<span style="color:#009">[[Domains#d|d]]</span> <span title="belt operand from ops window">x</span>) &#8594; [[Domains#d|d]] r<sub>0</sub></code>
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeAddd|like Addd [dd:d]]]
</div>
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{| class="mw-collapsible mw-collapsed wikitable" data-expandtext="&#9656;" data-collapsetext="&#9662;"
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
|-
| [[Cores/Decimal8/Encoding#380|Decimal8]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5 
|-
| [[Cores/Decimal16/Encoding#380|Decimal16]] || E0 E1 || d:d=4 dv:dv=4 q:q=5 qv:qv=5 
|}